diff options
| author | Sanjay Patel <spatel@rotateright.com> | 2018-02-01 19:59:33 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-02-01 19:59:33 +0000 |
| commit | d7bed1219278f3952b13013feab0a242b4267592 (patch) | |
| tree | 011db311e3bd90765076c50bd18120dd4f89847a | |
| parent | 3c80f4d9414bd21d5012486dbfcf1fc8f0af951b (diff) | |
| download | bcm5719-llvm-d7bed1219278f3952b13013feab0a242b4267592.tar.gz bcm5719-llvm-d7bed1219278f3952b13013feab0a242b4267592.zip | |
[AArch64] remove bogus comment; NFC
I added this comment with D42323, but as discussed in D42806, the architecture
does the right thing for denorms. We don't even need the select on 0.0 here?
llvm-svn: 323996
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 9d57e46bba5..b77f542af9d 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -5007,9 +5007,6 @@ SDValue AArch64TargetLowering::getSqrtEstimate(SDValue Operand, Step = DAG.getNode(AArch64ISD::FRSQRTS, DL, VT, Operand, Step, Flags); Estimate = DAG.getNode(ISD::FMUL, DL, VT, Estimate, Step, Flags); } - // FIXME: This does not detect denorm inputs, so we might produce INF - // when we should produce 0.0. Try to refactor the code in DAGCombiner, - // so we don't have to duplicate it here. if (!Reciprocal) { EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); |
