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| author | Eli Friedman <eli.friedman@gmail.com> | 2009-06-17 02:57:36 +0000 |
|---|---|---|
| committer | Eli Friedman <eli.friedman@gmail.com> | 2009-06-17 02:57:36 +0000 |
| commit | a0fba5319d07d453faee260656611d3e63a66ced (patch) | |
| tree | a13523c41b12a3c6b422fa2148a8bfb62aeb7d78 | |
| parent | 7af1d248f5637144c85d4c122fbdc0070e0bb633 (diff) | |
| download | bcm5719-llvm-a0fba5319d07d453faee260656611d3e63a66ced.tar.gz bcm5719-llvm-a0fba5319d07d453faee260656611d3e63a66ced.zip | |
PR3439: Correct a silly mistake in the SimplifyDemandedUseBits code for
SRem.
llvm-svn: 73598
| -rw-r--r-- | llvm/lib/Transforms/Scalar/InstructionCombining.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/2009-06-16-SRemDemandedBits.ll | 18 |
2 files changed, 19 insertions, 1 deletions
diff --git a/llvm/lib/Transforms/Scalar/InstructionCombining.cpp b/llvm/lib/Transforms/Scalar/InstructionCombining.cpp index 8dc8659648f..170b47694af 100644 --- a/llvm/lib/Transforms/Scalar/InstructionCombining.cpp +++ b/llvm/lib/Transforms/Scalar/InstructionCombining.cpp @@ -1336,7 +1336,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask, if (ConstantInt *Rem = dyn_cast<ConstantInt>(I->getOperand(1))) { APInt RA = Rem->getValue().abs(); if (RA.isPowerOf2()) { - if (DemandedMask.ule(RA)) // srem won't affect demanded bits + if (DemandedMask.ult(RA)) // srem won't affect demanded bits return I->getOperand(0); APInt LowBits = RA - 1; diff --git a/llvm/test/Transforms/InstCombine/2009-06-16-SRemDemandedBits.ll b/llvm/test/Transforms/InstCombine/2009-06-16-SRemDemandedBits.ll new file mode 100644 index 00000000000..230e2459055 --- /dev/null +++ b/llvm/test/Transforms/InstCombine/2009-06-16-SRemDemandedBits.ll @@ -0,0 +1,18 @@ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep srem +; PR3439 + +define i32 @a(i32 %x) nounwind { +entry: + %rem = srem i32 %x, 2 + %and = and i32 %rem, 2 + ret i32 %and +} +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep srem +; PR3439 + +define i32 @a(i32 %x) nounwind { +entry: + %rem = srem i32 %x, 2 + %and = and i32 %rem, 2 + ret i32 %and +} |

