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authorCraig Topper <craig.topper@intel.com>2018-12-20 01:32:06 +0000
committerCraig Topper <craig.topper@intel.com>2018-12-20 01:32:06 +0000
commit9ca2f5605e0915b2ae1042c8de63d4ed35591a06 (patch)
tree6559f8b278d049f8075809c42487c817001dffdb
parent92c129636115d1ab50ae4a2860b4450d04e3a09d (diff)
downloadbcm5719-llvm-9ca2f5605e0915b2ae1042c8de63d4ed35591a06.tar.gz
bcm5719-llvm-9ca2f5605e0915b2ae1042c8de63d4ed35591a06.zip
[X86] Disable custom widening of signed/unsigned add/sub saturation intrinsics under -x86-experimental-vector-widening-legalization.
Generic legalization should take care of this. llvm-svn: 349714
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp17
1 files changed, 10 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index e381d0cace0..10d96131c81 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -837,13 +837,16 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::SADDSAT, MVT::v8i16, Legal);
setOperationAction(ISD::USUBSAT, MVT::v8i16, Legal);
setOperationAction(ISD::SSUBSAT, MVT::v8i16, Legal);
- // Use widening instead of promotion.
- for (auto VT : { MVT::v8i8, MVT::v4i8, MVT::v2i8,
- MVT::v4i16, MVT::v2i16 }) {
- setOperationAction(ISD::UADDSAT, VT, Custom);
- setOperationAction(ISD::SADDSAT, VT, Custom);
- setOperationAction(ISD::USUBSAT, VT, Custom);
- setOperationAction(ISD::SSUBSAT, VT, Custom);
+
+ if (!ExperimentalVectorWideningLegalization) {
+ // Use widening instead of promotion.
+ for (auto VT : { MVT::v8i8, MVT::v4i8, MVT::v2i8,
+ MVT::v4i16, MVT::v2i16 }) {
+ setOperationAction(ISD::UADDSAT, VT, Custom);
+ setOperationAction(ISD::SADDSAT, VT, Custom);
+ setOperationAction(ISD::USUBSAT, VT, Custom);
+ setOperationAction(ISD::SSUBSAT, VT, Custom);
+ }
}
setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i16, Custom);
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