R600/SI: Fix backwards names for local atomic instructions.

The manual lists them as *_RTN_U32, not *_U32_RTN, which is more
consistent with how every other sized instruction is named.

llvm-svn: 210674

3 files changed, 12 insertions, 12 deletions

diff --git a/llvm/lib/Target/R600/SIInstructions.td b/llvm/lib/Target/R600/SIInstructions.td
index 70462a1e217..a9a771330eb 100644
--- a/llvm/lib/Target/R600/SIInstructions.td
+++ b/llvm/lib/Target/R600/SIInstructions.td
@@ -713,8 +713,8 @@ defm V_CMPX_CLASS_F64 : VOPC_64 <0x000000b8, "V_CMPX_CLASS_F64">;
 // DS Instructions
 //===----------------------------------------------------------------------===//
 
-def DS_ADD_U32_RTN : DS_1A1D_RET <0x20, "DS_ADD_U32_RTN", VReg_32>;
-def DS_SUB_U32_RTN : DS_1A1D_RET <0x21, "DS_SUB_U32_RTN", VReg_32>;
+def DS_ADD_RTN_U32 : DS_1A1D_RET <0x20, "DS_ADD_RTN_U32", VReg_32>;
+def DS_SUB_RTN_U32 : DS_1A1D_RET <0x21, "DS_SUB_RTN_U32", VReg_32>;
 def DS_WRITE_B32 : DS_Store_Helper <0x0000000d, "DS_WRITE_B32", VReg_32>;
 def DS_WRITE_B8 : DS_Store_Helper <0x00000001e, "DS_WRITE_B8", VReg_32>;
 def DS_WRITE_B16 : DS_Store_Helper <0x00000001f, "DS_WRITE_B16", VReg_32>;
@@ -2180,8 +2180,8 @@ multiclass DSAtomicPat<DS inst, ValueType vt, PatFrag frag> {
   >;
 }
 
-defm : DSAtomicPat<DS_ADD_U32_RTN, i32, atomic_load_add_local>;
-defm : DSAtomicPat<DS_SUB_U32_RTN, i32, atomic_load_sub_local>;
+defm : DSAtomicPat<DS_ADD_RTN_U32, i32, atomic_load_add_local>;
+defm : DSAtomicPat<DS_SUB_RTN_U32, i32, atomic_load_sub_local>;
 
 //===----------------------------------------------------------------------===//
 // MUBUF Patterns
diff --git a/llvm/test/CodeGen/R600/atomic_load_add.ll b/llvm/test/CodeGen/R600/atomic_load_add.ll
index 877602c50cc..c26f9cd80ea 100644
--- a/llvm/test/CodeGen/R600/atomic_load_add.ll
+++ b/llvm/test/CodeGen/R600/atomic_load_add.ll
@@ -3,7 +3,7 @@
 
 ; FUNC-LABEL: @atomic_add_local
 ; R600: LDS_ADD *
-; SI: DS_ADD_U32_RTN
+; SI: DS_ADD_RTN_U32
 define void @atomic_add_local(i32 addrspace(3)* %local) {
    %unused = atomicrmw volatile add i32 addrspace(3)* %local, i32 5 seq_cst
    ret void
@@ -11,7 +11,7 @@ define void @atomic_add_local(i32 addrspace(3)* %local) {
 
 ; FUNC-LABEL: @atomic_add_local_const_offset
 ; R600: LDS_ADD *
-; SI: DS_ADD_U32_RTN v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
+; SI: DS_ADD_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
 define void @atomic_add_local_const_offset(i32 addrspace(3)* %local) {
   %gep = getelementptr i32 addrspace(3)* %local, i32 4
   %val = atomicrmw volatile add i32 addrspace(3)* %gep, i32 5 seq_cst
@@ -20,7 +20,7 @@ define void @atomic_add_local_const_offset(i32 addrspace(3)* %local) {
 
 ; FUNC-LABEL: @atomic_add_ret_local
 ; R600: LDS_ADD_RET *
-; SI: DS_ADD_U32_RTN
+; SI: DS_ADD_RTN_U32
 define void @atomic_add_ret_local(i32 addrspace(1)* %out, i32 addrspace(3)* %local) {
   %val = atomicrmw volatile add i32 addrspace(3)* %local, i32 5 seq_cst
   store i32 %val, i32 addrspace(1)* %out
@@ -29,7 +29,7 @@ define void @atomic_add_ret_local(i32 addrspace(1)* %out, i32 addrspace(3)* %loc
 
 ; FUNC-LABEL: @atomic_add_ret_local_const_offset
 ; R600: LDS_ADD_RET *
-; SI: DS_ADD_U32_RTN v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x14
+; SI: DS_ADD_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x14
 define void @atomic_add_ret_local_const_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %local) {
   %gep = getelementptr i32 addrspace(3)* %local, i32 5
   %val = atomicrmw volatile add i32 addrspace(3)* %gep, i32 5 seq_cst
diff --git a/llvm/test/CodeGen/R600/atomic_load_sub.ll b/llvm/test/CodeGen/R600/atomic_load_sub.ll
index b2e10a9b3d7..3569d91e08d 100644
--- a/llvm/test/CodeGen/R600/atomic_load_sub.ll
+++ b/llvm/test/CodeGen/R600/atomic_load_sub.ll
@@ -3,7 +3,7 @@
 
 ; FUNC-LABEL: @atomic_sub_local
 ; R600: LDS_SUB *
-; SI: DS_SUB_U32_RTN
+; SI: DS_SUB_RTN_U32
 define void @atomic_sub_local(i32 addrspace(3)* %local) {
    %unused = atomicrmw volatile sub i32 addrspace(3)* %local, i32 5 seq_cst
    ret void
@@ -11,7 +11,7 @@ define void @atomic_sub_local(i32 addrspace(3)* %local) {
 
 ; FUNC-LABEL: @atomic_sub_local_const_offset
 ; R600: LDS_SUB *
-; SI: DS_SUB_U32_RTN v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
+; SI: DS_SUB_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
 define void @atomic_sub_local_const_offset(i32 addrspace(3)* %local) {
   %gep = getelementptr i32 addrspace(3)* %local, i32 4
   %val = atomicrmw volatile sub i32 addrspace(3)* %gep, i32 5 seq_cst
@@ -20,7 +20,7 @@ define void @atomic_sub_local_const_offset(i32 addrspace(3)* %local) {
 
 ; FUNC-LABEL: @atomic_sub_ret_local
 ; R600: LDS_SUB_RET *
-; SI: DS_SUB_U32_RTN
+; SI: DS_SUB_RTN_U32
 define void @atomic_sub_ret_local(i32 addrspace(1)* %out, i32 addrspace(3)* %local) {
   %val = atomicrmw volatile sub i32 addrspace(3)* %local, i32 5 seq_cst
   store i32 %val, i32 addrspace(1)* %out
@@ -29,7 +29,7 @@ define void @atomic_sub_ret_local(i32 addrspace(1)* %out, i32 addrspace(3)* %loc
 
 ; FUNC-LABEL: @atomic_sub_ret_local_const_offset
 ; R600: LDS_SUB_RET *
-; SI: DS_SUB_U32_RTN v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x14
+; SI: DS_SUB_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x14
 define void @atomic_sub_ret_local_const_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %local) {
   %gep = getelementptr i32 addrspace(3)* %local, i32 5
   %val = atomicrmw volatile sub i32 addrspace(3)* %gep, i32 5 seq_cst