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| author | Sanjay Patel <spatel@rotateright.com> | 2018-10-23 15:05:12 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-10-23 15:05:12 +0000 |
| commit | 747feb28e469a472e6ae5472385fac024ae1b632 (patch) | |
| tree | 2e9d1469f69a974fe3c52fab925f57118ed6fd32 | |
| parent | 37632992efde080a1c72fe9bfa95087c9cff5737 (diff) | |
| download | bcm5719-llvm-747feb28e469a472e6ae5472385fac024ae1b632.tar.gz bcm5719-llvm-747feb28e469a472e6ae5472385fac024ae1b632.zip | |
[InstCombine] use 'match' to handle vectors and simplify code
This is another step towards completely removing the fake
binop queries for not/neg/fneg.
llvm-svn: 345036
3 files changed, 6 insertions, 7 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp index c15999d81b3..00dcacccb40 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp @@ -1989,8 +1989,9 @@ Instruction *InstCombiner::visitSelectInst(SelectInst &SI) { } } - if (BinaryOperator::isNot(CondVal)) { - SI.setOperand(0, BinaryOperator::getNotArgument(CondVal)); + Value *NotCond; + if (match(CondVal, m_Not(m_Value(NotCond)))) { + SI.setOperand(0, NotCond); SI.setOperand(1, FalseVal); SI.setOperand(2, TrueVal); SI.swapProfMetadata(); diff --git a/llvm/test/Transforms/InstCombine/select_meta.ll b/llvm/test/Transforms/InstCombine/select_meta.ll index c9e277f1563..67dd246c040 100644 --- a/llvm/test/Transforms/InstCombine/select_meta.ll +++ b/llvm/test/Transforms/InstCombine/select_meta.ll @@ -322,13 +322,12 @@ define <2 x i32> @not_cond_vec(<2 x i1> %c, <2 x i32> %tv, <2 x i32> %fv) { ret <2 x i32> %r } -; FIXME: Should match vector 'not' with undef element. After that... +; Should match vector 'not' with undef element. ; The condition is inverted, and the select ops are swapped. The metadata should be swapped. define <2 x i32> @not_cond_vec_undef(<2 x i1> %c, <2 x i32> %tv, <2 x i32> %fv) { ; CHECK-LABEL: @not_cond_vec_undef( -; CHECK-NEXT: [[NOTC:%.*]] = xor <2 x i1> [[C:%.*]], <i1 undef, i1 true> -; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[NOTC]], <2 x i32> [[TV:%.*]], <2 x i32> [[FV:%.*]], !prof ![[$MD1]] +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i32> [[FV:%.*]], <2 x i32> [[TV:%.*]], !prof ![[$MD3]] ; CHECK-NEXT: ret <2 x i32> [[R]] ; %notc = xor <2 x i1> %c, <i1 undef, i1 true> diff --git a/llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll b/llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll index 69e202f8889..e341576e531 100644 --- a/llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll +++ b/llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll @@ -293,8 +293,7 @@ for.end: ; preds = %for.body ; CHECK-NEXT: [[BROADCAST_SPLAT6:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT5]], <4 x i32> undef, <4 x i32> zeroinitializer ; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i1> undef, i1 [[CMP]], i32 3 ; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> undef, i32 [[K]], i32 3 -; CHECK-NEXT: [[TMP4:%.*]] = xor <4 x i1> [[TMP2]], <i1 undef, i1 undef, i1 undef, i1 true> -; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[TMP4]], <4 x i32> [[TMP3]], <4 x i32> [[BROADCAST_SPLAT6]] +; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[TMP2]], <4 x i32> [[BROADCAST_SPLAT6]], <4 x i32> [[TMP3]] ; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[PREDPHI]], i32 3 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: |
