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authorRobert Khasanov <rob.khasanov@gmail.com>2014-08-21 09:43:43 +0000
committerRobert Khasanov <rob.khasanov@gmail.com>2014-08-21 09:43:43 +0000
commit46409eae8eaff3456bc1ed06b5ee2adb2c2ed3f6 (patch)
treec5b13907929c1ab9e84ebfd42d7aa6cd3f06d657
parent86ca6aaf400aa41b4a3c8f8fd18cf4669121a972 (diff)
downloadbcm5719-llvm-46409eae8eaff3456bc1ed06b5ee2adb2c2ed3f6.tar.gz
bcm5719-llvm-46409eae8eaff3456bc1ed06b5ee2adb2c2ed3f6.zip
[x86] Added _addcarry_ and _subborrow_ intrinsics
llvm-svn: 216164
-rw-r--r--llvm/include/llvm/IR/IntrinsicsX86.td12
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp10
-rw-r--r--llvm/test/CodeGen/X86/adx-intrinsics.ll51
3 files changed, 72 insertions, 1 deletions
diff --git a/llvm/include/llvm/IR/IntrinsicsX86.td b/llvm/include/llvm/IR/IntrinsicsX86.td
index 5fe90400e3f..bb45b2c05df 100644
--- a/llvm/include/llvm/IR/IntrinsicsX86.td
+++ b/llvm/include/llvm/IR/IntrinsicsX86.td
@@ -2768,6 +2768,18 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_addcarryx_u64: GCCBuiltin<"__builtin_ia32_addcarryx_u64">,
Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i64_ty, llvm_i64_ty,
llvm_ptr_ty], [IntrReadWriteArgMem]>;
+ def int_x86_addcarry_u32: GCCBuiltin<"__builtin_ia32_addcarry_u32">,
+ Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i32_ty, llvm_i32_ty,
+ llvm_ptr_ty], [IntrReadWriteArgMem]>;
+ def int_x86_addcarry_u64: GCCBuiltin<"__builtin_ia32_addcarry_u64">,
+ Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i64_ty, llvm_i64_ty,
+ llvm_ptr_ty], [IntrReadWriteArgMem]>;
+ def int_x86_subborrow_u32: GCCBuiltin<"__builtin_ia32_subborrow_u32">,
+ Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i32_ty, llvm_i32_ty,
+ llvm_ptr_ty], [IntrReadWriteArgMem]>;
+ def int_x86_subborrow_u64: GCCBuiltin<"__builtin_ia32_subborrow_u64">,
+ Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i64_ty, llvm_i64_ty,
+ llvm_ptr_ty], [IntrReadWriteArgMem]>;
}
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 81949942ddc..b2f2562f25a 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -15455,6 +15455,14 @@ static void InitIntinsicsMap() {
IntrinsicData(ADX, X86ISD::ADC, 0)));
IntrMap.insert(std::make_pair(Intrinsic::x86_addcarryx_u64,
IntrinsicData(ADX, X86ISD::ADC, 0)));
+ IntrMap.insert(std::make_pair(Intrinsic::x86_addcarry_u32,
+ IntrinsicData(ADX, X86ISD::ADC, 0)));
+ IntrMap.insert(std::make_pair(Intrinsic::x86_addcarry_u64,
+ IntrinsicData(ADX, X86ISD::ADC, 0)));
+ IntrMap.insert(std::make_pair(Intrinsic::x86_subborrow_u32,
+ IntrinsicData(ADX, X86ISD::SBB, 0)));
+ IntrMap.insert(std::make_pair(Intrinsic::x86_subborrow_u64,
+ IntrinsicData(ADX, X86ISD::SBB, 0)));
Initialized = true;
}
@@ -15547,7 +15555,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, const X86Subtarget *Subtarget,
return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(),
Ret, SDValue(InTrans.getNode(), 1));
}
- // ADC/ADCX
+ // ADC/ADCX/SBB
case ADX: {
SmallVector<SDValue, 2> Results;
SDVTList CFVTs = DAG.getVTList(Op->getValueType(0), MVT::Other);
diff --git a/llvm/test/CodeGen/X86/adx-intrinsics.ll b/llvm/test/CodeGen/X86/adx-intrinsics.ll
index 2711055a046..0498177a9c1 100644
--- a/llvm/test/CodeGen/X86/adx-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/adx-intrinsics.ll
@@ -1,3 +1,4 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 --show-mc-encoding| FileCheck %s --check-prefix=NOADX --check-prefix=CHECK
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=broadwell --show-mc-encoding| FileCheck %s --check-prefix=ADX --check-prefix=CHECK
declare i8 @llvm.x86.addcarryx.u32(i8, i32, i32, i8*)
@@ -24,3 +25,53 @@ define i8 @test_addcarryx_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) {
ret i8 %ret;
}
+declare i8 @llvm.x86.addcarry.u32(i8, i32, i32, i8*)
+
+define i8 @test_addcarry_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) {
+; CHECK-LABEL: test_addcarry_u32
+; CHECK: addb
+; ADX: adcxl
+; NOADX: adcl
+; CHECK: setb
+; CHECK: retq
+ %ret = tail call i8 @llvm.x86.addcarry.u32(i8 %c, i32 %a, i32 %b, i8* %ptr)
+ ret i8 %ret;
+}
+
+declare i8 @llvm.x86.addcarry.u64(i8, i64, i64, i8*)
+
+define i8 @test_addcarry_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) {
+; CHECK-LABEL: test_addcarry_u64
+; CHECK: addb
+; ADX: adcxq
+; NOADX: adcq
+; CHECK: setb
+; CHECK: retq
+ %ret = tail call i8 @llvm.x86.addcarry.u64(i8 %c, i64 %a, i64 %b, i8* %ptr)
+ ret i8 %ret;
+}
+
+declare i8 @llvm.x86.subborrow.u32(i8, i32, i32, i8*)
+
+define i8 @test_subborrow_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) {
+; CHECK-LABEL: test_subborrow_u32
+; CHECK: addb
+; CHECK: sbbl
+; CHECK: setb
+; CHECK: retq
+ %ret = tail call i8 @llvm.x86.subborrow.u32(i8 %c, i32 %a, i32 %b, i8* %ptr)
+ ret i8 %ret;
+}
+
+declare i8 @llvm.x86.subborrow.u64(i8, i64, i64, i8*)
+
+define i8 @test_subborrow_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) {
+; CHECK-LABEL: test_subborrow_u64
+; CHECK: addb
+; CHECK: sbbq
+; CHECK: setb
+; CHECK: retq
+ %ret = tail call i8 @llvm.x86.subborrow.u64(i8 %c, i64 %a, i64 %b, i8* %ptr)
+ ret i8 %ret;
+}
+
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