diff options
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-12-17 12:48:34 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-12-17 12:48:34 +0000 |
| commit | 193429ea15a60cb5c17e3ce9e2c9b3521eaf5d90 (patch) | |
| tree | 40115e6df8dd09d906b8b31dc81409e32a0a7698 | |
| parent | 7df342a4d1a6400646d7403104f840c218b0661d (diff) | |
| download | bcm5719-llvm-193429ea15a60cb5c17e3ce9e2c9b3521eaf5d90.tar.gz bcm5719-llvm-193429ea15a60cb5c17e3ce9e2c9b3521eaf5d90.zip | |
Regenerate test in prep for SimplifyDemandedBits improvements.
llvm-svn: 349350
| -rw-r--r-- | llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll b/llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll index c91646640b8..d564e9f6ae2 100644 --- a/llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll +++ b/llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll @@ -1,9 +1,11 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s ; ModuleID = '<stdin>' + target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-apple-darwin11.2.0" -; During legalization, the vselect mask is 'type legalized' into a +; During legalization, the vselect mask is 'type legalized' into a ; wider BUILD_VECTOR. This causes the introduction of a new ; sign_extend_inreg in the DAG. ; @@ -13,12 +15,16 @@ target triple = "x86_64-apple-darwin11.2.0" ; Make sure that the sign_extend_inreg is simplified and that we ; don't generate psll, psraw and pblendvb from the vselect. -; CHECK-LABEL: foo8 -; CHECK-NOT: psll -; CHECK-NOT: psraw -; CHECK-NOT: pblendvb -; CHECK: ret define void @foo8(float* nocapture %RET) nounwind { +; CHECK-LABEL: foo8: +; CHECK: ## %bb.0: ## %allocas +; CHECK-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero +; CHECK-NEXT: pmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero +; CHECK-NEXT: cvtdq2ps %xmm0, %xmm0 +; CHECK-NEXT: cvtdq2ps %xmm1, %xmm1 +; CHECK-NEXT: movups %xmm1, 16(%rdi) +; CHECK-NEXT: movups %xmm0, (%rdi) +; CHECK-NEXT: retq allocas: %resultvec.i = select <8 x i1> <i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true>, <8 x i8> <i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, <8 x i8> <i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100> %uint2float = uitofp <8 x i8> %resultvec.i to <8 x float> |
