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| author | Bill Wendling <isanbard@gmail.com> | 2010-06-09 18:15:36 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2010-06-09 18:15:36 +0000 |
| commit | db9e260123599c659cb3dbde7f881c0f80dbfb51 (patch) | |
| tree | 1d1488ad83df31a7db2519939a08275a02202327 | |
| parent | d90aa43bdf71d0ba59c25135c83c198aeac7a8ad (diff) | |
| download | bcm5719-llvm-db9e260123599c659cb3dbde7f881c0f80dbfb51.tar.gz bcm5719-llvm-db9e260123599c659cb3dbde7f881c0f80dbfb51.zip | |
- Fix description of SUBREG_TO_REG. It's not going to generate a zext. But it
is used to assert that an *implicit* zext is performed.
- Fix grammar-o in INSERT_SUBREG. (required reformatting)
llvm-svn: 105735
| -rw-r--r-- | llvm/include/llvm/Target/TargetOpcodes.h | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/llvm/include/llvm/Target/TargetOpcodes.h b/llvm/include/llvm/Target/TargetOpcodes.h index c4deaa8fbc1..808645ef54d 100644 --- a/llvm/include/llvm/Target/TargetOpcodes.h +++ b/llvm/include/llvm/Target/TargetOpcodes.h @@ -36,22 +36,21 @@ namespace TargetOpcode { /// truncation operations on target architectures which support it. EXTRACT_SUBREG = 6, - /// INSERT_SUBREG - This instruction takes three operands: a register - /// that has subregisters, a register providing an insert value, and a - /// subregister index. It returns the value of the first register with - /// the value of the second register inserted. The first register is - /// often defined by an IMPLICIT_DEF, as is commonly used to implement + /// INSERT_SUBREG - This instruction takes three operands: a register that + /// has subregisters, a register providing an insert value, and a + /// subregister index. It returns the value of the first register with the + /// value of the second register inserted. The first register is often + /// defined by an IMPLICIT_DEF, because it is commonly used to implement /// anyext operations on target architectures which support it. INSERT_SUBREG = 7, /// IMPLICIT_DEF - This is the MachineInstr-level equivalent of undef. IMPLICIT_DEF = 8, - /// SUBREG_TO_REG - This instruction is similar to INSERT_SUBREG except - /// that the first operand is an immediate integer constant. This constant - /// is often zero, as is commonly used to implement zext operations on - /// target architectures which support it, such as with x86-64 (with - /// zext from i32 to i64 via implicit zero-extension). + /// SUBREG_TO_REG - This instruction is similar to INSERT_SUBREG except that + /// the first operand is an immediate integer constant. This constant is + /// often zero, because it is commonly used to assert that the instruction + /// defining the register implicitly clears the high bits. SUBREG_TO_REG = 9, /// COPY_TO_REGCLASS - This instruction is a placeholder for a plain |

