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| author | Craig Topper <craig.topper@intel.com> | 2017-07-22 01:30:53 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-07-22 01:30:53 +0000 |
| commit | abfe380f9a114c2967d94cd40e52181f16d96e9f (patch) | |
| tree | 7b68af4a497666d04c42106bfeded5aa62430d1f | |
| parent | e88aef4b5fe3798a8350b4575ea9a27b7ee927cb (diff) | |
| download | bcm5719-llvm-abfe380f9a114c2967d94cd40e52181f16d96e9f.tar.gz bcm5719-llvm-abfe380f9a114c2967d94cd40e52181f16d96e9f.zip | |
[X86] Add nopq instruction which is a rex encoded version of nopl for gas compatibility.
llvm-svn: 308818
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 4 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/X86/x86-64.txt | 6 | ||||
| -rw-r--r-- | llvm/test/MC/X86/x86-32-coverage.s | 1 | ||||
| -rw-r--r-- | llvm/test/MC/X86/x86-64.s | 8 |
4 files changed, 19 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 700a9c0da79..e3e8d2d613c 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -1108,11 +1108,15 @@ let hasSideEffects = 0, SchedRW = [WriteZero] in { "nop{w}\t$zero", [], IIC_NOP>, TB, OpSize16; def NOOPL : I<0x1f, MRMXm, (outs), (ins i32mem:$zero), "nop{l}\t$zero", [], IIC_NOP>, TB, OpSize32; + def NOOPQ : RI<0x1f, MRMXm, (outs), (ins i64mem:$zero), + "nop{q}\t$zero", [], IIC_NOP>, TB; // Also allow register so we can assemble/disassemble def NOOPWr : I<0x1f, MRMXr, (outs), (ins GR16:$zero), "nop{w}\t$zero", [], IIC_NOP>, TB, OpSize16; def NOOPLr : I<0x1f, MRMXr, (outs), (ins GR32:$zero), "nop{l}\t$zero", [], IIC_NOP>, TB, OpSize32; + def NOOPQr : RI<0x1f, MRMXr, (outs), (ins GR64:$zero), + "nop{q}\t$zero", [], IIC_NOP>, TB; } diff --git a/llvm/test/MC/Disassembler/X86/x86-64.txt b/llvm/test/MC/Disassembler/X86/x86-64.txt index 659ad9051fd..dbfff0aed9b 100644 --- a/llvm/test/MC/Disassembler/X86/x86-64.txt +++ b/llvm/test/MC/Disassembler/X86/x86-64.txt @@ -480,3 +480,9 @@ # CHECK: lwpval $2309737967, (%esp), %edx 0x67 0x8f 0xea 0x68 0x12 0x0c 0x24 0xef 0xcd 0xab 0x89 + +# CHECK: nopq -559038737(%rbx,%rcx,8) +0x48 0x0f 0x1f 0x84 0xcb 0xef 0xbe 0xad 0xde + +# CHECK: nopq %rax +0x48 0x0f 0x1f 0xC0 diff --git a/llvm/test/MC/X86/x86-32-coverage.s b/llvm/test/MC/X86/x86-32-coverage.s index 706039a7a21..f15ece17049 100644 --- a/llvm/test/MC/X86/x86-32-coverage.s +++ b/llvm/test/MC/X86/x86-32-coverage.s @@ -2055,6 +2055,7 @@ // CHECK: encoding: [0x0f,0x1f,0x84,0xcb,0xef,0xbe,0xad,0xde] nopl 0xdeadbeef(%ebx,%ecx,8) + // CHECK: nopw 32493 // CHECK: encoding: [0x66,0x0f,0x1f,0x05,0xed,0x7e,0x00,0x00] nopw 0x7eed diff --git a/llvm/test/MC/X86/x86-64.s b/llvm/test/MC/X86/x86-64.s index d735737a92c..8612b9974f7 100644 --- a/llvm/test/MC/X86/x86-64.s +++ b/llvm/test/MC/X86/x86-64.s @@ -1509,3 +1509,11 @@ vmovq %xmm0, %rax // CHECK: movl %r15d, (%r15,%r15) // CHECK: encoding: [0x47,0x89,0x3c,0x3f] movl %r15d, (%r15,%r15) + +// CHECK: nopq 3735928559(%rbx,%rcx,8) +// CHECK: encoding: [0x48,0x0f,0x1f,0x84,0xcb,0xef,0xbe,0xad,0xde] +nopq 0xdeadbeef(%rbx,%rcx,8) + +// CHECK: nopq %rax +// CHECK: encoding: [0x48,0x0f,0x1f,0xc0] +nopq %rax |
