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| author | Dan Gohman <gohman@apple.com> | 2008-08-07 02:23:06 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-08-07 02:23:06 +0000 |
| commit | a8dbaeb1df09b2200aba9e835513c77c6c6955a3 (patch) | |
| tree | 2f6336cc5e01f3dd22edc4b6adcae158f42da397 | |
| parent | b086d3820da6ad5529366644689754d74ee907c4 (diff) | |
| download | bcm5719-llvm-a8dbaeb1df09b2200aba9e835513c77c6c6955a3.tar.gz bcm5719-llvm-a8dbaeb1df09b2200aba9e835513c77c6c6955a3.zip | |
Add an extra example that shouldn't get an and instruction.
llvm-svn: 54443
| -rw-r--r-- | llvm/test/CodeGen/X86/zext-inreg-1.ll | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/X86/zext-inreg-1.ll b/llvm/test/CodeGen/X86/zext-inreg-1.ll index 6a678b2e3b2..bc8e482d562 100644 --- a/llvm/test/CodeGen/X86/zext-inreg-1.ll +++ b/llvm/test/CodeGen/X86/zext-inreg-1.ll @@ -6,7 +6,12 @@ ; These should use movzbl instead of 'and 255'. ; This related to not having ZERO_EXTEND_REG node. -define i64 @h(i64 %d) nounwind { +define i64 @l(i64 %d) nounwind { + %e = add i64 %d, 1 + %retval = and i64 %e, 1099511627775 + ret i64 %retval +} +define i64 @m(i64 %d) nounwind { %e = add i64 %d, 1 %retval = and i64 %e, 281474976710655 ret i64 %retval |
