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| author | Reid Kleckner <rnk@google.com> | 2017-04-13 20:32:58 +0000 |
|---|---|---|
| committer | Reid Kleckner <rnk@google.com> | 2017-04-13 20:32:58 +0000 |
| commit | dbc9ba306198f7793cf29dcbd014151a012facf1 (patch) | |
| tree | 28558ffc19cd91a20d5ec3b7ac20297b3540d46a | |
| parent | 6c2615177bd9c0048917d627852da61d1a20df12 (diff) | |
| download | bcm5719-llvm-dbc9ba306198f7793cf29dcbd014151a012facf1.tar.gz bcm5719-llvm-dbc9ba306198f7793cf29dcbd014151a012facf1.zip | |
Fix -Wunused-value warning
llvm-svn: 300254
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp index d583449c5e8..2689cad994b 100644 --- a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp +++ b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp @@ -384,9 +384,9 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeRead2Pair( if (CI.BaseOff) { BaseReg = MRI->createVirtualRegister(&AMDGPU::VGPR_32RegClass); BaseRegFlags = RegState::Kill; - *BuildMI(*MBB, CI.Paired, DL, TII->get(AMDGPU::V_ADD_I32_e32), BaseReg) - .addImm(CI.BaseOff) - .addReg(AddrReg->getReg()); + BuildMI(*MBB, CI.Paired, DL, TII->get(AMDGPU::V_ADD_I32_e32), BaseReg) + .addImm(CI.BaseOff) + .addReg(AddrReg->getReg()); } MachineInstrBuilder Read2 = BuildMI(*MBB, CI.Paired, DL, Read2Desc, DestReg) @@ -456,9 +456,9 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeWrite2Pair( if (CI.BaseOff) { BaseReg = MRI->createVirtualRegister(&AMDGPU::VGPR_32RegClass); BaseRegFlags = RegState::Kill; - *BuildMI(*MBB, CI.Paired, DL, TII->get(AMDGPU::V_ADD_I32_e32), BaseReg) - .addImm(CI.BaseOff) - .addReg(Addr->getReg()); + BuildMI(*MBB, CI.Paired, DL, TII->get(AMDGPU::V_ADD_I32_e32), BaseReg) + .addImm(CI.BaseOff) + .addReg(Addr->getReg()); } MachineInstrBuilder Write2 = BuildMI(*MBB, CI.Paired, DL, Write2Desc) |
