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| author | Sagar Thakur <sagar.thakur@imgtec.com> | 2016-03-02 13:53:22 +0000 |
|---|---|---|
| committer | Sagar Thakur <sagar.thakur@imgtec.com> | 2016-03-02 13:53:22 +0000 |
| commit | 8f3381ed315604ff3a7853f22587d9115dd95a58 (patch) | |
| tree | 5d73f81f60a4f1aa776e6274dea37c2edf14a851 | |
| parent | 45dbfa1f83ddcb2ae8b7f0986668e1267bc3b5fe (diff) | |
| download | bcm5719-llvm-8f3381ed315604ff3a7853f22587d9115dd95a58.tar.gz bcm5719-llvm-8f3381ed315604ff3a7853f22587d9115dd95a58.zip | |
[TSAN] Fix test java_race_pc
Incremented the pc for each architecture in accordance with StackTrace:GetPreviousInstructionPC
Reviewers: samsonov, dvyukov
Subscribers: llvm-commits, mohit.bhakkad, jaydeep
Differential: http://reviews.llvm.org/D17802
llvm-svn: 262483
| -rw-r--r-- | compiler-rt/test/tsan/java_race_pc.cc | 4 | ||||
| -rw-r--r-- | compiler-rt/test/tsan/test.h | 10 |
2 files changed, 12 insertions, 2 deletions
diff --git a/compiler-rt/test/tsan/java_race_pc.cc b/compiler-rt/test/tsan/java_race_pc.cc index 0745ade6c47..53dc8976a78 100644 --- a/compiler-rt/test/tsan/java_race_pc.cc +++ b/compiler-rt/test/tsan/java_race_pc.cc @@ -13,7 +13,7 @@ void barbaz() { void *Thread(void *p) { barrier_wait(&barrier); - __tsan_read1_pc((jptr)p, (jptr)foobar + 1); + __tsan_read1_pc((jptr)p, (jptr)foobar + kPCInc); return 0; } @@ -26,7 +26,7 @@ int main() { __tsan_java_alloc(jheap, kBlockSize); pthread_t th; pthread_create(&th, 0, Thread, (void*)jheap); - __tsan_write1_pc((jptr)jheap, (jptr)barbaz + 1); + __tsan_write1_pc((jptr)jheap, (jptr)barbaz + kPCInc); barrier_wait(&barrier); pthread_join(th, 0); __tsan_java_free(jheap, kBlockSize); diff --git a/compiler-rt/test/tsan/test.h b/compiler-rt/test/tsan/test.h index a681daa3290..c9e90fab752 100644 --- a/compiler-rt/test/tsan/test.h +++ b/compiler-rt/test/tsan/test.h @@ -67,3 +67,13 @@ unsigned long long monotonic_clock_ns() { return (unsigned long long)t.tv_sec * 1000000000ull + t.tv_nsec; } #endif + +//The const kPCInc must be in sync with StackTrace::GetPreviousInstructionPc +#if defined(__powerpc64__) +// PCs are always 4 byte aligned. +const int kPCInc = 4; +#elif defined(__sparc__) || defined(__mips__) +const int kPCInc = 8; +#else +const int kPCInc = 1; +#endif |

