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authorJames Y Knight <jyknight@google.com>2016-09-02 20:29:11 +0000
committerJames Y Knight <jyknight@google.com>2016-09-02 20:29:11 +0000
commit6ef32bf2aff1e4ebcf8d8f82b297ab8f28961e2d (patch)
treeec6bc576050370fde9835c70a5ea7d237aee2470
parentb397ab5895a8b2c5638e8650ac94658ea7b4da1c (diff)
downloadbcm5719-llvm-6ef32bf2aff1e4ebcf8d8f82b297ab8f28961e2d.tar.gz
bcm5719-llvm-6ef32bf2aff1e4ebcf8d8f82b297ab8f28961e2d.zip
[Sparc] Mark i128 shift libcalls unavailable in 32-bit mode.
Recently, llvm wants to emit calls to these functions, while it didn't seem to be an issue before. Not sure why. Nor do I know why only these three are important to disable, out of all of the i128 libcalls. Nevertheless, many other targets have this snippet of code, so, just copying it to sparc as well, to unbreak things. llvm-svn: 280537
-rw-r--r--llvm/lib/Target/Sparc/SparcISelLowering.cpp7
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
index 3d743448e79..5421aef7f57 100644
--- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
@@ -1641,6 +1641,13 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::ATOMIC_STORE, MVT::i64, Custom);
}
+ if (!Subtarget->is64Bit()) {
+ // These libcalls are not available in 32-bit.
+ setLibcallName(RTLIB::SHL_I128, nullptr);
+ setLibcallName(RTLIB::SRL_I128, nullptr);
+ setLibcallName(RTLIB::SRA_I128, nullptr);
+ }
+
if (!Subtarget->isV9()) {
// SparcV8 does not have FNEGD and FABSD.
setOperationAction(ISD::FNEG, MVT::f64, Custom);
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