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| author | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2017-05-26 18:01:29 +0000 |
|---|---|---|
| committer | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2017-05-26 18:01:29 +0000 |
| commit | 6a2431df0b4e448c06836217cbd53103ccb903a5 (patch) | |
| tree | 4505850299d3e87baaf4009add82c66013628d70 | |
| parent | 43e76cd489250329cddb1fd575cf9fc9c17ea334 (diff) | |
| download | bcm5719-llvm-6a2431df0b4e448c06836217cbd53103ccb903a5.tar.gz bcm5719-llvm-6a2431df0b4e448c06836217cbd53103ccb903a5.zip | |
[AMDGPU][MC][GFX9] Corrected encoding of flat_scratch* for SDWA opcodes
See bug 33171: https://bugs.llvm.org/show_bug.cgi?id=33171
Reviewers: Sam Kolton
Differential Revision: https://reviews.llvm.org/D33553
llvm-svn: 304015
| -rw-r--r-- | llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/MC/AMDGPU/vop_sdwa.s | 4 |
2 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp index 4b2c3fa9b56..e02acf516c0 100644 --- a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp +++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp @@ -340,7 +340,7 @@ SIMCCodeEmitter::getSDWA9SrcEncoding(const MCInst &MI, unsigned OpNo, unsigned Reg = MO.getReg(); RegEnc |= MRI.getEncodingValue(Reg); RegEnc &= SDWA9EncValues::SRC_VGPR_MASK; - if (AMDGPU::isSGPR(Reg, &MRI)) { + if (AMDGPU::isSGPR(AMDGPU::mc2PseudoReg(Reg), &MRI)) { RegEnc |= SDWA9EncValues::SRC_SGPR_MASK; } return RegEnc; diff --git a/llvm/test/MC/AMDGPU/vop_sdwa.s b/llvm/test/MC/AMDGPU/vop_sdwa.s index 83faec16fd0..59dd30ed0e4 100644 --- a/llvm/test/MC/AMDGPU/vop_sdwa.s +++ b/llvm/test/MC/AMDGPU/vop_sdwa.s @@ -686,6 +686,10 @@ v_cmp_eq_f32_sdwa vcc, v1, s22 src0_sel:WORD_1 src1_sel:BYTE_2 // NOGFX9: error: invalid operand (violates constant bus restrictions) v_cmp_eq_f32_sdwa vcc, exec, vcc src0_sel:WORD_1 src1_sel:BYTE_2 +// NOSICI: error: +// NOVI: error: +// GFX9: v_ceil_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD ; encoding: [0xf9,0x8a,0x0a,0x7e,0x66,0x06,0x86,0x06] +v_ceil_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD //===----------------------------------------------------------------------===// // VOPC with arbitrary SGPR destination |
