Project Ortega BCM5719 LLVM https://git.raptorcs.com/git/bcm5719-llvm/atom?h=meklort-10.0.1 2019-12-25T00:27:51+00:00 2019-12-25T00:27:51+00:00 Fangrui Song maskray@google.com 2019-12-25T00:11:33+00:00 urn:sha1:a36ddf0aa9db5c1086e04f56b5f077b761712eb5 2019-12-24T23:57:33+00:00 Fangrui Song maskray@google.com 2019-12-24T23:52:21+00:00 urn:sha1:502a77f125f43ffde57af34d3fd1b900248a91cd 2019-06-19T16:02:54+00:00 Hubert Tong hubert.reinterpretcast@gmail.com 2019-06-19T16:02:54+00:00 urn:sha1:e9983eed5ad3238820d80904577a29212fcd4ab8 greater-than-sign is not a BRE special character. POSIX.1-2017 XBD Section 9.3.2 indicates that the interpretation of `\>` is undefined. This patch replaces the pattern. llvm-svn: 363828 2019-06-17T10:05:18+00:00 Sam Parker sam.parker@arm.com 2019-06-17T10:05:18+00:00 urn:sha1:60d6fb2a6344c4badfbc62daee6e71c588749312 Second functional change following on from rL362687. Pass the NoWrapFlags from the MulExpr to InsertBinop when we're generating a shl or mul. Differential Revision: https://reviews.llvm.org/D61934 llvm-svn: 363540 2019-06-17T09:51:07+00:00 Fangrui Song maskray@google.com 2019-06-17T09:51:07+00:00 urn:sha1:ac14f7b10cffe2be548607269e036244cd16acc3 llvm-svn: 363538 2019-06-14T09:19:41+00:00 Sam Parker sam.parker@arm.com 2019-06-14T09:19:41+00:00 urn:sha1:0cf9639a9c3e45582d112d17e3b23b9a79e9b49e InsertBinop now accepts NoWrapFlags, so pass them through when expanding a simple add expression. This is the first re-commit of the functional changes from rL362687, which was previously reverted. Differential Revision: https://reviews.llvm.org/D61934 llvm-svn: 363364 2019-06-13T18:13:03+00:00 David Bolvansky david.bolvansky@gmail.com 2019-06-13T18:13:03+00:00 urn:sha1:a9d8388e80c2a726b746e91b842116edee84831c llvm-svn: 363285 2019-06-06T12:35:46+00:00 Benjamin Kramer benny.kra@googlemail.com 2019-06-06T12:35:46+00:00 urn:sha1:f1249442cf3beacdf18fad448351285173069d44 This reverts commit r362687. Miscompiles llvm-profdata during selfhost. llvm-svn: 362699 2019-06-06T08:56:26+00:00 Sam Parker sam.parker@arm.com 2019-06-06T08:56:26+00:00 urn:sha1:7cc580f5e95e7e5dd84db2c276f58709258cd120 If the given SCEVExpr has no (un)signed flags attached to it, transfer these to the resulting instruction or use them to find an existing instruction. Differential Revision: https://reviews.llvm.org/D61934 llvm-svn: 362687 2019-05-25T06:17:47+00:00 Craig Topper craig.topper@intel.com 2019-05-25T06:17:47+00:00 urn:sha1:46e5052b8e2de46473959797ae310c3801a7cf17 INC/DEC is really a special case of a more generic issue. We should also turn leas into add reg/reg or add reg/imm regardless of the slow lea flags. This also supports LEA64_32 which has 64 bit input registers and 32 bit output registers. So we need to convert the 64 bit inputs to their 32 bit equivalents to check if they are equal to base reg. One thing to note, the original code preserved the kill flags by adding operands to the new instruction instead of using addReg. But I think tied operands aren't supposed to have the kill flag set. I dropped the kill flags, but I could probably try to preserve it in the add reg/reg case if we think its important. Not sure which operand its supposed to go on for the LEA64_32r instruction due to the super reg implicit uses. Though I'm also not sure those are needed since they were probably just created by an INSERT_SUBREG from a 32-bit input. Differential Revision: https://reviews.llvm.org/D61472 llvm-svn: 361691