<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bcm5719-llvm/llvm/test/Transforms/CodeGenPrepare, branch meklort-10.0.1</title>
<subtitle>Project Ortega BCM5719 LLVM</subtitle>
<id>https://git.raptorcs.com/git/bcm5719-llvm/atom?h=meklort-10.0.1</id>
<link rel='self' href='https://git.raptorcs.com/git/bcm5719-llvm/atom?h=meklort-10.0.1'/>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/'/>
<updated>2020-02-19T12:32:46+00:00</updated>
<entry>
<title>[CodeGen][Tests] Fix b3cf70427eb1e97d9b89ba6e9298c280c8a32c74</title>
<updated>2020-02-19T12:32:46+00:00</updated>
<author>
<name>Clement Courbet</name>
<email>courbet@google.com</email>
</author>
<published>2020-02-19T12:29:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=be45a5a4092d678c992ac5d32e4b41da9367989a'/>
<id>urn:sha1:be45a5a4092d678c992ac5d32e4b41da9367989a</id>
<content type='text'>
Add missing lit.local.cfg in test/Transforms/CodeGenPrepare/PowerPC
</content>
</entry>
<entry>
<title>[CodeGen] Fix the computation of the alignment of split stores.</title>
<updated>2020-02-12T14:29:31+00:00</updated>
<author>
<name>Hans Wennborg</name>
<email>hans@chromium.org</email>
</author>
<published>2020-02-12T14:27:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=b3cf70427eb1e97d9b89ba6e9298c280c8a32c74'/>
<id>urn:sha1:b3cf70427eb1e97d9b89ba6e9298c280c8a32c74</id>
<content type='text'>
By Clement Courbet!

Backported from rG15488ff24b4a
</content>
</entry>
<entry>
<title>Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351</title>
<updated>2019-12-24T23:57:33+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>maskray@google.com</email>
</author>
<published>2019-12-24T23:52:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=502a77f125f43ffde57af34d3fd1b900248a91cd'/>
<id>urn:sha1:502a77f125f43ffde57af34d3fd1b900248a91cd</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[PGO][PGSO] Enable size optimizations in code gen / target passes for cold code.</title>
<updated>2019-12-13T19:01:19+00:00</updated>
<author>
<name>Hiroshi Yamauchi</name>
<email>yamauchi@google.com</email>
</author>
<published>2019-11-07T16:52:05+00:00</published>
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<id>urn:sha1:ed50e6060b1c51ec4a5dad6c01a64a5f1526cdb5</id>
<content type='text'>
Summary: Split off of D67120.

Reviewers: davidxl

Subscribers: hiraditya, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, lenary, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71288
</content>
</entry>
<entry>
<title>Reapply r374743 with a fix for the ocaml binding</title>
<updated>2019-10-14T16:15:14+00:00</updated>
<author>
<name>Joerg Sonnenberger</name>
<email>joerg@bec.de</email>
</author>
<published>2019-10-14T16:15:14+00:00</published>
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<id>urn:sha1:9681ea9560a00038a29ed368dfa32104b0597b26</id>
<content type='text'>
Add a pass to lower is.constant and objectsize intrinsics

This pass lowers is.constant and objectsize intrinsics not simplified by
earlier constant folding, i.e. if the object given is not constant or if
not using the optimized pass chain. The result is recursively simplified
and constant conditionals are pruned, so that dead blocks are removed
even for -O0. This allows inline asm blocks with operand constraints to
work all the time.

The new pass replaces the existing lowering in the codegen-prepare pass
and fallbacks in SDAG/GlobalISEL and FastISel. The latter now assert
on the intrinsics.

Differential Revision: https://reviews.llvm.org/D65280

llvm-svn: 374784
</content>
</entry>
<entry>
<title>Revert "Add a pass to lower is.constant and objectsize intrinsics"</title>
<updated>2019-10-14T12:22:48+00:00</updated>
<author>
<name>Dmitri Gribenko</name>
<email>gribozavr@gmail.com</email>
</author>
<published>2019-10-14T12:22:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=1a21f98ac3c57d027908000b8bac356daec51416'/>
<id>urn:sha1:1a21f98ac3c57d027908000b8bac356daec51416</id>
<content type='text'>
This reverts commit r374743. It broke the build with Ocaml enabled:
http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/19218

llvm-svn: 374768
</content>
</entry>
<entry>
<title>Add a pass to lower is.constant and objectsize intrinsics</title>
<updated>2019-10-13T23:00:15+00:00</updated>
<author>
<name>Joerg Sonnenberger</name>
<email>joerg@bec.de</email>
</author>
<published>2019-10-13T23:00:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=e4300c392de28b659749d77b415b4903786caa0c'/>
<id>urn:sha1:e4300c392de28b659749d77b415b4903786caa0c</id>
<content type='text'>
This pass lowers is.constant and objectsize intrinsics not simplified by
earlier constant folding, i.e. if the object given is not constant or if
not using the optimized pass chain. The result is recursively simplified
and constant conditionals are pruned, so that dead blocks are removed
even for -O0. This allows inline asm blocks with operand constraints to
work all the time.

The new pass replaces the existing lowering in the codegen-prepare pass
and fallbacks in SDAG/GlobalISEL and FastISel. The latter now assert
on the intrinsics.

Differential Revision: https://reviews.llvm.org/D65280

llvm-svn: 374743
</content>
</entry>
<entry>
<title>[NFC} Updated test</title>
<updated>2019-09-17T09:45:52+00:00</updated>
<author>
<name>David Bolvansky</name>
<email>david.bolvansky@gmail.com</email>
</author>
<published>2019-09-17T09:45:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=3d33e97be638bb8e91481decb1da07d8123ec17f'/>
<id>urn:sha1:3d33e97be638bb8e91481decb1da07d8123ec17f</id>
<content type='text'>
llvm-svn: 372093
</content>
</entry>
<entry>
<title>[CGP] Ensure sinking multiple instructions does not invalidate dominance checks</title>
<updated>2019-09-12T16:00:07+00:00</updated>
<author>
<name>David Green</name>
<email>david.green@arm.com</email>
</author>
<published>2019-09-12T16:00:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=a6e944b1731107c647df7aa2c9b026d6a9818c90'/>
<id>urn:sha1:a6e944b1731107c647df7aa2c9b026d6a9818c90</id>
<content type='text'>
In MVE, as of rL371218, we are attempting to sink chains of instructions such as:
  %l1 = insertelement &lt;8 x i8&gt; undef, i8 %l0, i32 0
  %broadcast.splat26 = shufflevector &lt;8 x i8&gt; %l1, &lt;8 x i8&gt; undef, &lt;8 x i32&gt; zeroinitializer
In certain situations though, we can end up breaking the dominance relations of
instructions. This happens when we sink the instruction into a loop, but cannot
remove the originals. The Use is updated, which might in fact be a Use from the
second instruction to the first.

This attempts to fix that by reversing the order of instruction that are sunk,
and ensuring that we update the uses on new instructions if they have already
been sunk, not the old ones.

Differential Revision: https://reviews.llvm.org/D67366

llvm-svn: 371743
</content>
</entry>
<entry>
<title>[ARM] Sink add/mul(shufflevector(insertelement())) for MVE instruction selection</title>
<updated>2019-09-06T16:01:32+00:00</updated>
<author>
<name>Sam Tebbs</name>
<email>sam.tebbs@arm.com</email>
</author>
<published>2019-09-06T16:01:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=f1cdd95a2fe79fbcd7fd440509a754bc3afaf088'/>
<id>urn:sha1:f1cdd95a2fe79fbcd7fd440509a754bc3afaf088</id>
<content type='text'>
This patch sinks add/mul(shufflevector(insertelement())) into the basic block in which they are used so that they can then be selected together.

This is useful for various MVE instructions, such as vmla and others that take R registers.

Loop tests have been added to the vmla test file to make sure vmlas are generated in loops.

Differential revision: https://reviews.llvm.org/D66295

llvm-svn: 371218
</content>
</entry>
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