Project Ortega BCM5719 LLVM https://git.raptorcs.com/git/bcm5719-llvm/atom?h=meklort-10.0.1 2019-12-25T00:27:51+00:00 2019-12-25T00:27:51+00:00 Fangrui Song maskray@google.com 2019-12-25T00:11:33+00:00 urn:sha1:a36ddf0aa9db5c1086e04f56b5f077b761712eb5 2019-12-24T23:57:33+00:00 Fangrui Song maskray@google.com 2019-12-24T23:52:21+00:00 urn:sha1:502a77f125f43ffde57af34d3fd1b900248a91cd 2019-10-28T20:55:30+00:00 Artem Belevich tra@google.com 2019-10-22T21:07:15+00:00 urn:sha1:d9972f848294b06807c8764615852ba2bc1e8a74 Differential Revision: https://reviews.llvm.org/D69324 2019-10-14T16:53:34+00:00 Artem Belevich tra@google.com 2019-10-14T16:53:34+00:00 urn:sha1:5c6ab2a0b1f2da22c8ce4fbfc022f599aaa4a2a6 Also, amend constraints for non-sync variants that are no longer available on sm_70+ with PTX6.4+. Differential Revision: https://reviews.llvm.org/D68892 llvm-svn: 374790 2019-07-30T19:52:01+00:00 Michael Liao michael.hliao@gmail.com 2019-07-30T19:52:01+00:00 urn:sha1:f3983cc14af31e8ad2e6bf3031237040a3afdbf5 Summary: - Use the passed `DL` directly as retrieving data layout from CS by checking the called function is not reliable. Under indirect function call, there is no called function. Subscribers: jholewinski, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65468 llvm-svn: 367349 2019-07-11T17:11:25+00:00 Benjamin Kramer benny.kra@googlemail.com 2019-07-11T17:11:25+00:00 urn:sha1:fa1a4e4de536d2693ccee67761c9da77f1cccff2 AutoUpgrade the old intrinsics to atomicrmw fadd. llvm-svn: 365796 2019-05-10T11:23:04+00:00 Tim Northover tnorthover@apple.com 2019-05-10T11:23:04+00:00 urn:sha1:6c1e3f94938f29ff4bbc447c489fe951a4529042 We were applying a pointer truncation to floating types, which crashed LLVM. That is Not A Good Thing(TM). llvm-svn: 360421 2019-04-26T18:45:04+00:00 Nick Desaulniers ndesaulniers@google.com 2019-04-26T18:45:04+00:00 urn:sha1:7ab164c4a427b559a7a47fa62ef365862705f950 Summary: Targets like ARM, MSP430, PPC, and SystemZ have complex behavior when printing the address of a MachineOperand::MO_GlobalAddress. Move that handling into a new overriden method in each base class. A virtual method was added to the base class for handling the generic case. Refactors a few subclasses to support the target independent %a, %c, and %n. The patch also contains small cleanups for AVRAsmPrinter and SystemZAsmPrinter. It seems that NVPTXTargetLowering is possibly missing some logic to transform GlobalAddressSDNodes for TargetLowering::LowerAsmOperandForConstraint to handle with "i" extended inline assembly asm constraints. Fixes: - https://bugs.llvm.org/show_bug.cgi?id=41402 - https://github.com/ClangBuiltLinux/linux/issues/449 Reviewers: echristo, void Reviewed By: void Subscribers: void, craig.topper, jholewinski, dschuff, jyknight, dylanmckay, sdardis, nemanjai, javed.absar, sbc100, jgravelle-google, eraman, kristof.beyls, hiraditya, aheejin, kbarton, fedor.sergeev, jrtc27, atanasyan, jsji, llvm-commits, kees, tpimh, nathanchance, peter.smith, srhines Tags: #llvm Differential Revision: https://reviews.llvm.org/D60887 llvm-svn: 359337 2019-04-25T22:27:57+00:00 Artem Belevich tra@google.com 2019-04-25T22:27:57+00:00 urn:sha1:16737538f4fc4757ae5226e95b177155ed8e13ad All of the new instructions are still handled mostly by tablegen. I've slightly refactored the code to drive intrinsic/instruction generation from a master list of supported variants, so all irregularities have to be implemented in one place only. The test generation script wmma.py has been refactored in a similar way. Differential Revision: https://reviews.llvm.org/D60015 llvm-svn: 359247 2019-04-25T22:27:46+00:00 Artem Belevich tra@google.com 2019-04-25T22:27:46+00:00 urn:sha1:8d825b38ed2c3198f0523baef788227832298b9c PTX 6.3 requires using ".aligned" in the MMA instruction names. In order to generate correct name, now we pass current PTX version to each instruction as an extra constant operand and InstPrinter adjusts its output accordingly. Differential Revision: https://reviews.llvm.org/D59393 llvm-svn: 359246