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<title>bcm5719-llvm/llvm/lib/Target, branch meklort-10.0.1</title>
<subtitle>Project Ortega BCM5719 LLVM</subtitle>
<id>https://git.raptorcs.com/git/bcm5719-llvm/atom?h=meklort-10.0.1</id>
<link rel='self' href='https://git.raptorcs.com/git/bcm5719-llvm/atom?h=meklort-10.0.1'/>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/'/>
<updated>2020-08-01T17:47:48+00:00</updated>
<entry>
<title>Add a quick hack so clang does not use mul type instructions on mips.</title>
<updated>2020-08-01T17:47:48+00:00</updated>
<author>
<name>Evan Lojewski</name>
<email>github@meklort.com</email>
</author>
<published>2019-05-06T01:24:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=e87058e93695dd203fdff5dfc9579d8420766d1e'/>
<id>urn:sha1:e87058e93695dd203fdff5dfc9579d8420766d1e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[PPCAsmPrinter] support 'L' output template for memory operands</title>
<updated>2020-06-25T23:19:39+00:00</updated>
<author>
<name>Nick Desaulniers</name>
<email>ndesaulniers@google.com</email>
</author>
<published>2020-06-15T21:21:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=b294e611271abeb5c9c49d7fb216b9bdcc323872'/>
<id>urn:sha1:b294e611271abeb5c9c49d7fb216b9bdcc323872</id>
<content type='text'>
Summary:
L is meant to support the second word used by 32b calling conventions for 64b arguments.

This is required for build 32b PowerPC Linux kernels after upstream
commit 334710b1496a ("powerpc/uaccess: Implement unsafe_put_user() using 'asm goto'")

Thanks for the report from @nathanchance, and reference to GCC's
implementation from @segher.

Fixes: pr/46186
Fixes: https://github.com/ClangBuiltLinux/linux/issues/1044

Reviewers: echristo, hfinkel, MaskRay

Reviewed By: MaskRay

Subscribers: MaskRay, wuzish, nemanjai, hiraditya, kbarton, steven.zhang, llvm-commits, segher, nathanchance, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81767

(cherry picked from commit 2d8e105db6bea10a6b96e4a094e73a87987ef909)
</content>
</entry>
<entry>
<title>[AArch64] Change AArch64 Windows EH UnwindHelp object to be a fixed object</title>
<updated>2020-06-25T23:19:14+00:00</updated>
<author>
<name>Daniel Frampton</name>
<email>Daniel.Frampton@microsoft.com</email>
</author>
<published>2020-03-31T20:12:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=a110c3fc8cd9368627ce0386d7d16756be3d62ac'/>
<id>urn:sha1:a110c3fc8cd9368627ce0386d7d16756be3d62ac</id>
<content type='text'>
The UnwindHelp object is used during exception handling by runtime
code. It must be findable from a fixed offset from FP.

This change allocates the UnwindHelp object as a fixed object (as is
done for x86_64) to ensure that both the generated code and runtime
agree on the location of the object.

Fixes https://bugs.llvm.org/show_bug.cgi?id=45346

Differential Revision: https://reviews.llvm.org/D77016

(cherry picked from commit 494abe139a9aab991582f1b3f3370b99b252944c)
</content>
</entry>
<entry>
<title>[AArch64] Fix mismatch in prologue and epilogue for funclets on Windows</title>
<updated>2020-06-25T23:19:14+00:00</updated>
<author>
<name>Daniel Frampton</name>
<email>Daniel.Frampton@microsoft.com</email>
</author>
<published>2020-03-31T20:11:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=69fb858731e857abcabe74dcf6db344030ca650b'/>
<id>urn:sha1:69fb858731e857abcabe74dcf6db344030ca650b</id>
<content type='text'>
The generated code for a funclet can have an add to sp in the epilogue
for which there is no corresponding sub in the prologue.

This patch removes the early return from emitPrologue that was
preventing the sub to sp, and instead conditionalizes the appropriate
parts of the rest of the function.

Fixes https://bugs.llvm.org/show_bug.cgi?id=45345

Differential Revision: https://reviews.llvm.org/D77015

(cherry picked from commit 522b4c4b88a5606b0074926e8658e7fede97c230)
</content>
</entry>
<entry>
<title>[RISCV] Fix incorrect FP base CFI offset for variable argument functions</title>
<updated>2020-06-25T23:13:53+00:00</updated>
<author>
<name>Shiva Chen</name>
<email>shiva@andestech.com</email>
</author>
<published>2020-02-03T05:52:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=43ca67c05d2881d00075a15de555af1b19370294'/>
<id>urn:sha1:43ca67c05d2881d00075a15de555af1b19370294</id>
<content type='text'>
When the FP exists, the FP base CFI directive offset should take the size of variable arguments into account.

Differential Revision: https://reviews.llvm.org/D73862

(cherry picked from commit 64f417200e1020305f28f3c1e40691585f50f6ad)
</content>
</entry>
<entry>
<title>[RISCV64] Emit correct lib call for fp(float/double) to ui/si</title>
<updated>2020-06-25T23:13:53+00:00</updated>
<author>
<name>Kamlesh Kumar</name>
<email>kamleshbhalui@gmail.com</email>
</author>
<published>2020-06-18T13:46:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=249fef00d925ce56d7eb1f6910064a586716cba4'/>
<id>urn:sha1:249fef00d925ce56d7eb1f6910064a586716cba4</id>
<content type='text'>
Since i32 is not legal in riscv64,
it always promoted to i64 before emitting lib call and
for conversions like float/double to int and float/double to unsigned int
wrong lib call was emitted. This commit fix it using custom lowering.

Differential Revision: https://reviews.llvm.org/D80526

(cherry picked from commit 7622ea5835f0381a426e504f4c03f11733732b83)
</content>
</entry>
<entry>
<title>[X86] Add an Unoptimized Load Value Injection (LVI) Load Hardening Pass</title>
<updated>2020-06-24T16:31:04+00:00</updated>
<author>
<name>Scott Constable</name>
<email>scott.d.constable@intel.com</email>
</author>
<published>2020-06-10T22:31:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=72bff7855d8ce42b831922a51763f9a0732bd473'/>
<id>urn:sha1:72bff7855d8ce42b831922a51763f9a0732bd473</id>
<content type='text'>
@nikic raised an issue on D75936 that the added complexity to the O0 pipeline was causing noticeable slowdowns for `-O0` builds. This patch addresses the issue by adding a pass with equal security properties, but without any optimizations (and more importantly, without the need for expensive analysis dependencies).

Reviewers: nikic, craig.topper, mattdr

Reviewed By: craig.topper, mattdr

Differential Revision: https://reviews.llvm.org/D80964
</content>
</entry>
<entry>
<title>[X86] Add Support for Load Hardening to Mitigate Load Value Injection (LVI)</title>
<updated>2020-06-24T16:31:04+00:00</updated>
<author>
<name>Scott Constable</name>
<email>scott.d.constable@intel.com</email>
</author>
<published>2020-05-11T18:30:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=8aa8abae349dc1607884c24ca3b685d4c7d597d1'/>
<id>urn:sha1:8aa8abae349dc1607884c24ca3b685d4c7d597d1</id>
<content type='text'>
After finding all such gadgets in a given function, the pass minimally inserts
LFENCE instructions in such a manner that the following property is satisfied:
for all SOURCE+SINK pairs, all paths in the CFG from SOURCE to SINK contain at
least one LFENCE instruction. The algorithm that implements this minimal
insertion is influenced by an academic paper that minimally inserts memory
fences for high-performance concurrent programs:

http://www.cs.ucr.edu/~lesani/companion/oopsla15/OOPSLA15.pdf

The algorithm implemented in this pass is as follows:

1. Build a condensed CFG (i.e., a GadgetGraph) consisting only of the following components:
  -SOURCE instructions (also includes function arguments)
  -SINK instructions
  -Basic block entry points
  -Basic block terminators
  -LFENCE instructions
2. Analyze the GadgetGraph to determine which SOURCE+SINK pairs (i.e., gadgets) are already mitigated by existing LFENCEs. If all gadgets have been mitigated, go to step 6.
3. Use a heuristic or plugin to approximate minimal LFENCE insertion.
4. Insert one LFENCE along each CFG edge that was cut in step 3.
5. Go to step 2.
6. If any LFENCEs were inserted, return true from runOnFunction() to tell LLVM that the function was modified.

By default, the heuristic used in Step 3 is a greedy heuristic that avoids
inserting LFENCEs into loops unless absolutely necessary. There is also a
CLI option to load a plugin that can provide even better optimization,
inserting fewer fences, while still mitigating all of the LVI gadgets.
The plugin can be found here: https://github.com/intel/lvi-llvm-optimization-plugin,
and a description of the pass's behavior with the plugin can be found here:
https://software.intel.com/security-software-guidance/insights/optimized-mitigation-approach-load-value-injection.

Differential Revision: https://reviews.llvm.org/D75937
</content>
</entry>
<entry>
<title>[X86] Add a Pass that builds a Condensed CFG for Load Value Injection (LVI) Gadgets</title>
<updated>2020-06-24T16:31:04+00:00</updated>
<author>
<name>Scott Constable</name>
<email>scott.d.constable@intel.com</email>
</author>
<published>2020-05-11T17:25:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=363720c2b0f60b512c5f5b8bfbf010f86d078152'/>
<id>urn:sha1:363720c2b0f60b512c5f5b8bfbf010f86d078152</id>
<content type='text'>
Adds a new data structure, ImmutableGraph, and uses RDF to find LVI gadgets and add them to a MachineGadgetGraph.

More specifically, a new X86 machine pass finds Load Value Injection (LVI) gadgets consisting of a load from memory (i.e., SOURCE), and any operation that may transmit the value loaded from memory over a covert channel, or use the value loaded from memory to determine a branch/call target (i.e., SINK).

Also adds a new target feature to X86: +lvi-load-hardening

The feature can be added via the clang CLI using -mlvi-hardening.

Differential Revision: https://reviews.llvm.org/D75936
</content>
</entry>
<entry>
<title>[X86] Fix to X86LoadValueInjectionRetHardeningPass for possible segfault</title>
<updated>2020-06-24T16:31:04+00:00</updated>
<author>
<name>Scott Constable</name>
<email>scott.d.constable@intel.com</email>
</author>
<published>2020-04-11T00:32:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/bcm5719-llvm/commit/?id=ac40e7a02efbadd5c91d2fec85aac29ab9a6af18'/>
<id>urn:sha1:ac40e7a02efbadd5c91d2fec85aac29ab9a6af18</id>
<content type='text'>
`MBB.back()` could segfault if `MBB.empty()`. Fixed by checking for `MBB.empty()` in the loop.

Differential Revision: https://reviews.llvm.org/D77584
</content>
</entry>
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