Project Ortega BCM5719 LLVM https://git.raptorcs.com/git/bcm5719-llvm/atom?h=ortega-7.0.1 2018-10-19T19:56:57+00:00 2018-10-19T19:56:57+00:00 Tom Stellard tstellar@redhat.com 2018-10-19T19:56:57+00:00 urn:sha1:cddf73ef269ca589993366e1f7d6662b8976d6ed ------------------------------------------------------------------------ r343373 | rksimon | 2018-09-29 06:25:22 -0700 (Sat, 29 Sep 2018) | 3 lines [X86][SSE] Fixed issue with v2i64 variable shifts on 32-bit targets The shift amount might have peeked through a extract_subvector, altering the number of vector elements in the 'Amt' variable - so we were incorrectly calculating the ratio when peeking through bitcasts, resulting in incorrectly detecting splats. ------------------------------------------------------------------------ llvm-svn: 344810 2018-10-19T19:14:17+00:00 Tom Stellard tstellar@redhat.com 2018-10-19T19:14:17+00:00 urn:sha1:80adf409497be8b6a80c8e72ae0e208efd730893 ------------------------------------------------------------------------ r343428 | ctopper | 2018-09-30 16:43:30 -0700 (Sun, 30 Sep 2018) | 3 lines [X86] Change an llvm_unreachable to a report_fatal_error so the optimizer will stop making us reach the other report_fatal_error in this function. There's a conditional report_fatal_error just above this llvm_unreachable. The optimizer when seeing the unreachable removes the conditional and just makes any other error trigger the existing report_fatal_error. ------------------------------------------------------------------------ llvm-svn: 344805 2018-10-19T19:11:17+00:00 Tom Stellard tstellar@redhat.com 2018-10-19T19:11:17+00:00 urn:sha1:78605c68f3c8727a840f9a452130336c700e3ec2 ------------------------------------------------------------------------ r343443 | ctopper | 2018-10-01 00:08:41 -0700 (Mon, 01 Oct 2018) | 9 lines [X86] Stop X86DomainReassignment from creating copies between GR8/GR16 physical registers and k-registers. We can only copy between a k-register and a GR32/GR64 register. This patch detects that the copy will be illegal and prevents the domain reassignment from happening for that closure. This probably isn't the best fix, and we should probably figure out how to handle this correctly. Fixes PR38803. ------------------------------------------------------------------------ llvm-svn: 344804 2018-09-06T08:58:13+00:00 Hans Wennborg hans@hanshq.net 2018-09-06T08:58:13+00:00 urn:sha1:d2647fa6f2b6def20ebc537d6daa0818dd561f8a ------------------------------------------------------------------------ r341512 | ctopper | 2018-09-06 04:03:14 +0200 (Thu, 06 Sep 2018) | 7 lines [X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives. This basically reverts a change made in r336217, but improves the text of the error message for not allowing IP-relative addressing in 32-bit mode. Fixes PR38826. Patch by Iain Sandoe. ------------------------------------------------------------------------ llvm-svn: 341530 2018-08-21T19:58:00+00:00 Hans Wennborg hans@hanshq.net 2018-08-21T19:58:00+00:00 urn:sha1:5396514e131e8c6f14cf0766a8732d115f60511c ------------------------------------------------------------------------ r339895 | niravd | 2018-08-16 18:31:14 +0200 (Thu, 16 Aug 2018) | 13 lines [MC][X86] Enhance X86 Register expression handling to more closely match GCC. Allow the comparison of x86 registers in the evaluation of assembler directives. This generalizes and simplifies the extension from r334022 to catch another case found in the Linux kernel. Reviewers: rnk, void Reviewed By: rnk Subscribers: hiraditya, nickdesaulniers, llvm-commits Differential Revision: https://reviews.llvm.org/D50795 ------------------------------------------------------------------------ ------------------------------------------------------------------------ r339896 | d0k | 2018-08-16 18:50:23 +0200 (Thu, 16 Aug 2018) | 1 line [MC] Remove unused variable ------------------------------------------------------------------------ llvm-svn: 340329 2018-08-17T07:38:52+00:00 Hans Wennborg hans@hanshq.net 2018-08-17T07:38:52+00:00 urn:sha1:54989e78e4e4b7d875e183688457a6b6d7530b80 ------------------------------------------------------------------------ r339945 | ctopper | 2018-08-16 23:54:02 +0200 (Thu, 16 Aug 2018) | 9 lines [X86] In EFLAGS copy pass, don't emit EXTRACT_SUBREG instructions since we're after peephole Normally the peephole pass converts EXTRACT_SUBREG to COPY instructions. But we're after peephole so we can't rely on it to clean these up. To fix this, the eflags pass now emits a COPY with a subreg input. I also noticed that in 32-bit mode we need to constrain the input to the copy to ensure the subreg is valid. Otherwise we'll fail verify-machineinstrs Differential Revision: https://reviews.llvm.org/D50656 ------------------------------------------------------------------------ llvm-svn: 339999 2018-08-03T10:26:56+00:00 Hans Wennborg hans@hanshq.net 2018-08-03T10:26:56+00:00 urn:sha1:69794107d9ed7d349498c4ab6a8166054cf6f3c7 ------------------------------------------------------------------------ r338599 | vlad.tsyrklevich | 2018-08-01 19:44:37 +0200 (Wed, 01 Aug 2018) | 16 lines [X86] FastISel fall back on !absolute_symbol GVs Summary: D25878, which added support for !absolute_symbol for normal X86 ISel, did not add support for materializing references to absolute symbols for X86 FastISel. This causes build failures because FastISel generates PC-relative relocations for absolute symbols. Fall back to normal ISel for references to !absolute_symbol GVs. Fix for PR38200. Reviewers: pcc, craig.topper Reviewed By: pcc Subscribers: hiraditya, llvm-commits, kcc Differential Revision: https://reviews.llvm.org/D50116 ------------------------------------------------------------------------ llvm-svn: 338847 2018-08-01T13:06:14+00:00 Simon Pilgrim llvm-dev@redking.me.uk 2018-08-01T13:06:14+00:00 urn:sha1:564762cf329544e303a35962e93fac31861b623b llvm-svn: 338530 2018-08-01T11:24:11+00:00 Simon Pilgrim llvm-dev@redking.me.uk 2018-08-01T11:24:11+00:00 urn:sha1:e447a273bd714c5338fc5c4270b3b657a407064c llvm-svn: 338516 2018-08-01T10:24:27+00:00 Andrew V. Tischenko andrew.v.tischenko@gmail.com 2018-08-01T10:24:27+00:00 urn:sha1:dad919d357a21ae4bf4cab0ed31203315363bb79 Differential Revision: https://reviews.llvm.org/D49243 llvm-svn: 338507