bcm5719-llvm/llvm/lib/Target/Mips/MipsISelLowering.cpp, branch meklort-10.0.1

Add a quick hack so clang does not use mul type instructions on mips.

2020-08-01T17:47:48+00:00

[MIPS] Don't emit R_(MICRO)MIPS_JALR relocations against data symbols

2020-01-13T14:14:03+00:00

The R_(MICRO)MIPS_JALR optimization only works when used against functions. Using the relocation against a data symbol (e.g. function pointer) will cause some linkers that don't ignore the hint in this case (e.g. LLD prior to commit 5bab291b7b) to generate a relative branch to the data symbol which crashes at run time. Before this patch, LLVM was erroneously emitting these relocations against local-dynamic TLS function pointers and global function pointers with internal visibility. Reviewers: atanasyan, jrtc27, vstefanovic Reviewed By: atanasyan Differential Revision: https://reviews.llvm.org/D72571

CodeGen: Use LLT instead of EVT in getRegisterByName

2020-01-09T22:37:52+00:00

Only PPC seems to be using it, and only checks some simple cases and doesn't distinguish between FP. Just switch to using LLT to simplify use from GlobalISel.

[NFC] Use EVT instead of bool for getSetCCInverse()

2019-12-13T12:22:03+00:00

Summary: The use of a boolean isInteger flag (generally initialized using VT.isInteger()) caused errors in our out-of-tree CHERI backend (https://github.com/CTSRD-CHERI/llvm-project). In our backend, pointers use a separate ValueType (iFATPTR) and therefore .isInteger() returns false. This meant that getSetCCInverse() was using the floating-point variant and generated incorrect code for us: `(void *)0x12033091e < (void *)0xffffffffffffffff` would return false. Committing this change will significantly reduce our merge conflicts for each upstream merge. Reviewers: spatel, bogner Reviewed By: bogner Subscribers: wuzish, arsenm, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, jrtc27, atanasyan, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70917

[Mips] Add support for min/max/umin/umax atomics

2019-12-12T10:32:37+00:00

In order to properly implement these atomic we need one register more than other binary atomics. It is used for storing result from comparing values in addition to the one that is used for actual result of operation. https://reviews.llvm.org/D71028

[SVE][CodeGen] Scalable vector MVT size queries

2019-11-18T12:30:59+00:00

* Implements scalable size queries for MVTs, split out from D53137. * Contains a fix for FindMemType to avoid using scalable vector type to contain non-scalable types. * Explicit casts for several places where implicit integer sign changes or promotion from 32 to 64 bits caused problems. * CodeGenDAGPatterns will treat scalable and non-scalable vector types as different. Reviewers: greened, cameron.mcinally, sdesmalen, rovka Reviewed By: rovka Differential Revision: https://reviews.llvm.org/D66871

[mips] Reduce number of nested `if` statements. NFC

2019-11-13T19:57:55+00:00

[mips] Fix `getRegForInlineAsmConstraint` to do not crash on empty Constraint

2019-11-05T21:50:39+00:00

[mips] Split long lines in the code. NFC

2019-11-02T21:50:52+00:00

TLI: Remove DAG argument from getRegisterByName

2019-10-01T01:44:39+00:00

Replace with the MachineFunction. X86 is the only user, and only uses it for the function. This removes one obstacle from using this in GlobalISel. The other is the more tolerable EVT argument. The X86 use of the function seems questionable to me. It checks hasFP, before frame lowering. llvm-svn: 373292