diff options
| -rw-r--r-- | main.v | 13 | ||||
| -rw-r--r-- | system_fpga.pcf | 4 |
2 files changed, 14 insertions, 3 deletions
@@ -14,7 +14,7 @@ module system_fpga_top output reg sysgood, // BMC status - input wire bmc_boot_phase_in, + input wire bmc_boot_phase_pin, // Enable outputs output reg vdda_en, @@ -115,6 +115,17 @@ module system_fpga_top .D_IN_0(flexver_reset_req_l) ); + // The boot phase line from the BMC requires a pullup to 3.3V + // RAJA + wire bmc_boot_phase_in; + SB_IO #( + .PIN_TYPE(6'b000001), + .PULLUP(1'b1) + ) bmc_boot_phase_pin_io ( + .PACKAGE_PIN(bmc_boot_phase_pin), + .D_IN_0(bmc_boot_phase_in) + ); + // Make NIC activity lights work // WARNING: Hic Sunt Dracones! // diff --git a/system_fpga.pcf b/system_fpga.pcf index 9538c3a..b238294 100644 --- a/system_fpga.pcf +++ b/system_fpga.pcf @@ -34,7 +34,7 @@ set_io sysen 15 set_io sysgood 53 # BMC status -set_io bmc_boot_phase_in 13 +set_io bmc_boot_phase_pin 13 # Power Plane Enable set_io vdda_en 72 @@ -109,4 +109,4 @@ set_io panel_nic3_led_cathode 100 # Front panel switches set_io panel_reset_in_l 73 -set_io flexver_reset_in_l 74
\ No newline at end of file +set_io flexver_reset_in_l 74 |
